EMULATION/DESIGN SERVICES REDUCE COSTLY SILICON RESPINS.

Silicon Logic Engineering (SLE) and Mentor Graphics Corp. (NASDAQ:MENT) have formed a business collaboration that speeds mission-critical design verification and dramatically reduces the risk of costly additional manufacturing operations due to undetected design errors.

Ideal for the networking and high-speed computing companies whose very complex ASIC (application specific integrated circuit) designs exceed the capabilities of other chip verification solutions, this collaboration unites SLE's proven design methodologies and Mentor's popular VStation(TM) emulation environment. VStation, which simulates the chip's functionality and performance within an electronic …